Derylus
Open dashboard
Bas
- AI inference optimization at NXP
- Cum laude at the University of Twente
- Computational number theory research at the University of Michigan
Automated model optimization for edge hardware
Derylus tunes AI models for a specific chip with agentic AI using real measurements on that chip.
Fitting a model to a chip takes repeated specialist work
Each new model or chip restarts much of that work. Many companies do not optimize at all. Recipes do not simply transfer: the right one depends on the chip.
| Technique | Effect on speed | Reason |
|---|---|---|
| INT8 quantization | Main lever, smaller gain than on newer cores | No ARMv8.2 dot-product instructions |
| FP16 conversion | No speedup, only saves memory | No native FP16 arithmetic |
| Unstructured pruning | Little or no speedup | Sparse weights do not remove much compute on this CPU |
| Channel pruning | Real speedup, needs fine-tuning | Removes compute from the network |
A closed loop, with every result measured and traceable
Set task
Choose the model, chip, limits, and budget.
Propose
The agent forms a hypothesis from all past attempts, including failures.
Build
A model is built based on this hypothesis.
Measure
Speed is measured on the real chip. Accuracy is measured on real data.
Compare
The result updates the frontier of speed against accuracy.
- Measured, not claimed
- Scores are measured on real devices and real data.
- Traceable
- Each result can be traced back to how it was produced.
- Several good answers
- A frontier gives a choice of trade-offs, not one "best" model.
Our team combines ML, embedded systems, and systems experience
All four of us: MSc AI at the University of Amsterdam.
Richard
- 2 years as an ML engineer in industry
- GPU research at the University of Amsterdam
- Cum laude BSc AI at the University of Groningen
Maks
- Previously at TSMC and Goldman Sachs
- Cum laude in computer science at TU Eindhoven
Liam
- Agentic digital twin adaptation at MIT
- BESS energy trading sensitivity analysis at Huawei
Where we are
We optimize AI models for chips like the NVIDIA Jetson Nano. We are at an early stage, and we are talking to practitioners to learn where model optimization matters most.
Do you run models on edge hardware?
Walk us through your current process. We want to learn how you fit models to chips, and what that work costs you.
Contact the team